Fairchild Semiconductor Electronic Components Datasheet


FDZ663P

MOSFET



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FDZ663P
December 2011
P-Channel 1.5 V Specified PowerTrench® Thin WL-CSP MOSFET
-20 V, -2.7 A, 134 mΩ
Features
General Description
„ Max rDS(on) = 134 mΩ at VGS = -4.5 V, ID = -2 A
„ Max rDS(on) = 171 mΩ at VGS = -2.5 V, ID = -1.5 A
„ Max rDS(on) = 216 mΩ at VGS = -1.8 V, ID = -1 A
„ Max rDS(on) = 288 mΩ at VGS = -1.5 V, ID = -1 A
„ Occupies only 0.64 mm2 of PCB area. Less than 16% of the
area of 2 x 2 BGA
„ Ultra-thin package: less than 0.4 mm height when mounted
to PCB
„ RoHS Compliant
Designed on Fairchild's advanced 1.5 V PowerTrench® process
with state of the art "fine pitch" Thin WLCSP packaging process,
the FDZ663P minimizes both PCB space and rDS(on). This
advanced WLCSP MOSFET embodies a breakthrough in
packaging technology which enables the device to combine
excellent thermal transfer characteristics, ultra-low profile (0.4
mm) and small (0.8x0.8 mm2) packaging, low gate charge, and
low rDS(on).
Applications
„ Battery management
„ Load switch
„ Battery protection
S
DS
G
Pin 1
S
G
BOTTOM
Pin 1
TOP
WL-CSP 0.8X0.8 Thin
D
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
-Continuous
-Pulsed
TA = 25 °C
Power Dissipation
TA = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 1b)
Ratings
-20
±8
-2.7
-10
1.3
0.4
-55 to +150
Units
V
V
A
W
°C
RθJA
RθJA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
93
311
°C/W
Device Marking
EJ
Device
FDZ663P
Package
WL-CSP 0.8X0.8 Thin
Reel Size
7”
Tape Width
8 mm
Quantity
5000 units
©2011 Fairchild Semiconductor Corporation
FDZ663P Rev.C1
1
www.fairchildsemi.com


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Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = -250 μA, VGS = 0 V
-20
V
ID = -250 μA, referenced to 25 °C -14 mV/°C
VDS = -16 V, VGS = 0 V
VGS = ±8 V, VDS = 0 V
-1 μA
±60 nA
On Characteristics
VGS(th)
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Static Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = -250 μA
-0.3 -0.7 -1.2
V
ID = -250 μA, referenced to 25 °C 2.4 mV/°C
VGS = -4.5 V, ID = -2 A
VGS = -2.5 V, ID = -1.5 A
VGS = -1.8 V, ID = -1 A
VGS = -1.5 V, ID = -1 A
VGS = -4.5 V, ID = -2 A, TJ =125°C
VDD = -5 V, ID = -2 A
103 134
122 171
149 216 mΩ
186 288
137 198
8S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = -10 V, VGS = 0 V,
f = 1 MHz
394 525
62 85
53 80
pF
pF
pF
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VDD = -10 V, ID = -2.5 A,
VGS = -4.5 V, RGEN = 6 Ω
VGS = -4.5 V, VDD = -10 V,
ID = -2.5 A
4.8 10 ns
6.2 12 ns
67 107 ns
32 52 ns
5.9 8.2 nC
0.6 nC
1.6 nC
Drain-Source Diode Characteristics
VSD Source to Drain Diode Forward Voltage
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = -1.4 A (Note 2)
IF = -2.5 A, di/dt = 100 A/μs
-0.8 -1.2
30 48
10 18
V
ns
nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 93 °C/W when mounted on
a 1 in2 pad of 2 oz copper.
b. 311 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
©2011 Fairchild Semiconductor Corporation
FDZ663P Rev.C1
2
www.fairchildsemi.com


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Typical Characteristics TJ = 25 °C unless otherwise noted
10
VGS = -4.5 V
8 VGS = -3 V
VGS = -2.5 V
6
4 VGS = -1.8 V
2
VGS = -1.5 V PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0123
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
3
VGS = -1.5 V
2
VGS = -1.8 V
VGS = -2.5 V
1
VGS = -3 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
024
6
-ID, DRAIN CURRENT (A)
VGS = -4.5 V
8 10
Figure 2. Normalized On-Resistance vs
Drain Current and Gate Voltage
1.6
ID = -2 A
VGS = -4.5 V
1.4
1.2
1.0
0.8
0.6
-75 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. Normalized On- Resistance
vs Junction Temperature
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
8
VDS = -5 V
6
4
TJ = 150 oC
2 TJ = 25 oC
TJ = -55 oC
0
0 0.5 1.0 1.5 2.0
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
2.5
600
ID = -2 A
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
450
300
TJ = 125 oC
150
TJ = 25 oC
0
1.0 1.5 2.0 2.5 3.0 3.5 4.0
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance vs Gate to
Source Voltage
4.5
10
VGS = 0 V
1 TJ = 150 oC
0.1 TJ = 25 oC
0.01
TJ = -55 oC
0.001
0
0.2 0.4 0.6 0.8 1.0
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
1.2
©2011 Fairchild Semiconductor Corporation
FDZ663P Rev.C1
3
www.fairchildsemi.com


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Typical Characteristics TJ = 25 °C unless otherwise noted
4.5
ID = -2.5 A
VDD = -8 V
3.0
VDD = -10 V
VDD = -12 V
1.5
0
024
Qg, GATE CHARGE (nC)
6
Figure 7. Gate Charge Characteristics
2000
1000
Ciss
100 Coss
f = 1 MHz
VGS = 0 V
Crss
10
0.1
1 10
-VDS, DRAIN TO SOURCE VOLTAGE (V)
20
Figure8. CapacitancevsDrain
to Source Voltage
50
10
100 us
1 1 ms
THIS AREA IS
0.1 LIMITED BY rDS(on)
SINGLE PULSE
0.01
TJ = MAX RATED
RθJA = 311 oC/W
TA = 25 oC
0.001
0.1
1
10 ms
100 ms
1s
10 s
DC
10
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 9. Forward Bias Safe
Operating Area
100
1000
100
10
SINGLE PULSE
RθJA = 311 oC/W
TA = 25 oC
1
0.1
10-4 10-3 10-2 10-1
1
10
t, PULSE WIDTH (sec)
100 1000
Figure 10. Single Pluse Maximum
Power Dissipation
2
1 DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.1 0.05
0.02
0.01
PDM
0.01
SINGLE PULSE
RθJA = 311 oC/W
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
0.001
10-4
10-3
10-2
10-1
1
10
t, RECTANGULAR PULSE DURATION (sec)
100
Figure 11. Junction-to-Ambient Transient Thermal Response Curve
1000
©2011 Fairchild Semiconductor Corporation
FDZ663P Rev.C1
4
www.fairchildsemi.com


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Dimensional Outline and Pad Layout
©2011 Fairchild Semiconductor Corporation
FDZ663P Rev.C1
5
www.fairchildsemi.com


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©2011 Fairchild Semiconductor Corporation
FDZ663P Rev.C1
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
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Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I60
6 www.fairchildsemi.com


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