Fairchild Semiconductor Electronic Components Datasheet


FDS6911

MOSFET



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December 2011
FDS6911
Dual N-Channel Logic Level PowerTrench® MOSFET
20V, 7.5A, 13mΩ
General Description
These N-Channel Logic Level MOSFETs are produced
using Fairchild Semiconductor’s advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
superior switching performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
Features
„ rDS(on) = 13 mΩ @ VGS = 10 V
rDS(on) = 17 mΩ @ VGS = 4.5 V
„ Fast switching speed
„ Low gate charge
„ High performance trench technology for extremely
low RDS(ON)
„ High power and current handling capability
DD2
DD2
DD1
DD1
SO-8
Pin 1 SO-8
G2
S2 G
G1
S1 S
S
S
S1 1
G1 2
S2 3
G2 4
Q1 8 D1
7 D1
Q2 6 D2
5 D2
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
Power Dissipation for Single Operation
(Note 1a)
(Note 1a)
(Note 1b)
(Note 1c)
TJ, TSTG
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS6911
FDS6911
13’’
Ratings
20
± 20
7.5
20
1.6
1.0
0.9
–55 to +150
78
40
Tape width
12mm
Units
V
V
A
W
°C
°C/W
°C/W
Quantity
2500 units
©2011 Fairchild Semiconductor Corporation
FDS6911 Rev C1
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Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSS Gate–Source Leakage
VGS = 0 V, ID = 250 μA
ID = 250 μA, Referenced to 25°C
VDS = 20 V, VGS = 0 V
VDS = 20 V, VGS = 0 V, TJ = 55°C
VGS = ±20 V, VDS = 0 V
20
V
28 mV/°C
1
10
±100
μA
nA
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
ΔVGS(th)
ΔTJ
rDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID(on)
On–State Drain Current
gFS Forward Transconductance
VDS = VGS, ID = 250 μA
ID = 250 μA, Referenced to 25°C
1
VGS = 10 V, ID = 7.5 A
VGS = 4.5 V, ID = 6.5 A
VGS = 10 V, ID = 7.5 A,TJ = 125°C
VGS = 10 V, VDS = 5 V
VDS = 5 V, ID = 7.5 A
20
1.8 3
–4.7
10.6 13
13 17
14.5 20
36
V
mV/°C
mΩ
A
S
Dynamic Characteristics
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
RG Gate Resistance
VDS = 15 V, V GS = 0 V,
f = 1.0 MHz
VGS = 15 mV, f = 1.0 MHz
1130
300
100
2.4
pF
pF
pF
Ω
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time
tr Turn–On Rise Time
td(off) Turn–Off Delay Time
tf Turn–Off Fall Time
Qg(TOT)
Total Gate Charge at Vgs=10V
Qg Total Gate Charge at Vgs=5V
Qgs Gate–Source Charge
Qgd Gate–Drain Charge
VDD = 15 V, ID = 1 A,
VGS = 10 V, RGEN = 6 Ω
VDD = 15 V, ID = 7.5 A,
9 18
5 10
26 42
7 14
17 24
9 13
3.1
2.7
ns
ns
ns
ns
nC
nC
nC
nC
FDS6911 Rev C1
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Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
VGS = 0 V, IS = 1.3 A (Note 2)
Voltage
trr
Diode Reverse Recovery Time
IF = 7.5 A, diF/dt = 100 A/µs
Qrr Diode Reverse Recovery Charge
1.3
1.2
24
13
A
V
nS
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°C/W when
mounted on a
0.5 in2 pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%
b) 125°C/W when
mounted on a .02 in2
pad of 2 oz copper
c) 135°C/W when mounted on a
minimum pad.
FDS6911 Rev C1
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Typical Characteristics
20
VGS = 10.0V
16
4.5V
12
3.5V
4.0V
3.0V
8
4
0
0 0.25 0.5 0.75 1 1.25
VDS, DRAIN-SOURCE VOLTAGE (V)
1.5
2.6
VGS = 3.0V
2.2
1.8
3.5V
1.4
4.0
1
4.5V
5.0
6.0V
10.0V
0.6
0
4 8 12 16
ID, DRAIN CURRENT (A)
20
Figure 1. On-Region Characteristics.
1.6
ID = 7.5A
VGS = 10V
1.4
1.2
1
0.8
0.6
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.04
0.03
0.02
ID = 3.8A
TA = 125oC
0.01
TA = 25oC
0
2468
VGS, GATE TO SOURCE VOLTAGE (V)
10
Figure 3. On-Resistance Variation with
Temperature.
20
VDS = 5V
16
12
TA = 125oC
25oC
8
-55oC
4
0
1.5
2 2.5 3 3.5
VGS, GATE TO SOURCE VOLTAGE (V)
4
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
VGS = 0V
10
1
TA = 125oC
0.1
0.01
0.001
25oC
-55oC
0.0001
0
0.2 0.4 0.6 0.8
1
VSD, BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 5. Transfer Characteristics.
FDS6911 Rev C1
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
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Typical Characteristics
10
ID = 7.5A
8
6
4
VDS = 10V
20V
15V
2
0
0 4 8 12 16 20
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
100
RDS(ON) LIMIT
10
1
1ms
10ms
100ms
1s
10s
DC
100μs
0.1
0.01
VGS = 10V
SINGLE PULSE
RθJA = 135oC/W
TA = 25oC
0.1 1 10
VDS, DRAIN-SOURCE VOLTAGE (V)
100
Figure 9. Maximum Safe Operating Area.
1400
1200
1000
f = 1MHz
VGS = 0 V
Ciss
800
600
Coss
400
200
0
0
Crss
5 10 15 20 25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 8. Capacitance Characteristics.
50
SINGLE PULSE
RθJA = 135°C/W
40 TA = 25°C
30
20
10
0
0.001
0.01
0.1 1 10
t1, TIME (sec)
100
Figure 10. Single Pulse Maximum
Power Dissipation.
1000
1
0.1
0.01
0.001
0.0001
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
RθJA(t) = r(t) * RθJA
RθJA = 135°C/W
P(pk)
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.001
0.01
0.1 1
t1, TIME (sec)
10
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
100
1000
FDS6911 Rev C1
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Rev. I60


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