Fairchild Semiconductor Electronic Components Datasheet


FDY102PZ

MOSFET



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FDY102PZ
Single P-Channel (1.5 V) Specified PowerTrench® MOSFET
April 2014
–20 V, –0.83 A, 0.5 Ω
Features
General Description
„ Max rDS(on) = 0.5 Ω at VGS = –4.5 V, ID = –0.83 A
„ Max rDS(on) = 0.7 Ω at VGS = –2.5 V, ID = –0.70 A
„ Max rDS(on) = 1.2 Ω at VGS = –1.8 V, ID = –0.43 A
„ Max rDS(on) = 1.8 Ω at VGS = –1.5 V, ID = –0.36 A
„ HBM ESD protection level = 1400 V (Note 3)
„ RoHS Compliant
This Single P-Channel MOSFET has been designed using
Fairchild Semiconductor’s advanced Power Trench process to
optimize the rDS(on)@VGS = –1.5 V.
Application
„ Li-Ion Battery Pack
S
G
D SC89-3
G1
S2
3D
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
Power Dissipation
Power Dissipation
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 1b)
Ratings
–20
±8
–0.83
–1.0
0.625
0.446
–55 to +150
Units
V
V
A
W
°C
RθJA
RθJA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
200
280
°C/W
Device Marking
E
Device
FDY102PZ
Package
SC89-3
Reel Size
7”
Tape Width
8 mm
Quantity
3000 units
©2008 Fairchild Semiconductor Corporation
FDY102PZ Rev.B3
1
www.fairchildsemi.com


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Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
IGSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Leakage Current
ID = –250 μA, VGS = 0 V
ID = –250 μA, referenced to 25 °C
VDS = –16 V, VGS = 0 V
VGS = ±8 V, VDS = 0 V
VGS = ±5 V, VDS = 0 V
–20
V
-11 mV/°C
–1 μA
±10 μA
±0.5 μA
On Characteristics (Note 2)
VGS(th)
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Static Drain to Source On-Resistance
gFS Forward Transconductance
VGS = VDS, ID = –250 μA
–0.4 –0.7 –1.0
V
ID = –250 μA, referenced to 25 °C
3 mV/°C
VGS = –4.5 V, ID = –0.83 A
VGS = –2.5 V, ID = –0.70 A
VGS = –1.8 V, ID = –0.43 A
VGS = –1.5 V, ID = –0.36 A
VGS = –4.5 V, ID = –0.83 A,
TJ =125 °C
VDD = –5 V, ID = –0.83 A
0.28
0.36
0.47
0.62
0.39
2
0.5
0.7
1.2
1.8
0.85
Ω
S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = –10 V, VGS = 0 V,
f = 1 MHz
100 135
23 35
18 30
pF
pF
pF
Switching Characteristics (Note 2)
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VDD = –10 V, ID = –0.83 A
VGS = –4.5 V, RGEN = 6 Ω
VDD = –10 V, ID = –0.83 A
VGS = –4.5 V
3.5 10
ns
2.9 10
ns
23 37 ns
13 23 ns
2.2 3.1 nC
0.3 nC
0.6 nC
Drain-Source Diode Characteristics and Maximum Rating
IS Maximum Continuous Drain-Source Diode Forward Current
VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = –0.52 A (Note 2)
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IF = –0.83 A, dIF/dt = 100 A/μs
–0.52
–1.0 –1.2
18 31
3.8 10
A
V
ns
nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the
user's board design.
a) 200 oC/W when mounted on
a 1 in2 pad of 2 oz copper.
b) 280 oC/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0%
3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
FDY102PZ Rev.B3
2
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Typical Characteristics TJ = 25 °C unless otherwise noted
1.0
VGS = -4.5 V
0.8 VGS = -2.5 V
VGS = -1.5 V
0.6
VGS = -2.0 V
VGS = -1.8 V
0.4
0.2
0.0
0.0
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0.5 1.0 1.5
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On Region Characteristics
2.0
4.5
4.0 VGS = -1.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5%MAX
3.5
VGS = -1.8 V
3.0
VGS = -2.0V
2.5
2.0
VGS = -2.5 V
1.5
1.0
0.5
0.0
VGS = -4.5 V
0.5 1.0 1.5
-ID, DRAIN CURRENT (A)
2.0
2.5
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.6
ID = -0.83 A
VGS = -4.5 V
1.4
1.2
2.0
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
1.6
ID = -0.415 A
1.2
1.0
0.8
0.6
-75 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. Normalized On Resistance
vs Junction Temperature
0.8
TJ = 125 oC
0.4
0.0
1.0
TJ = 25 oC
1.5 2.0 2.5 3.0 3.5 4.0
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance vs Gate to
Source Voltage
4.5
1.0
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0.8
VDS = -5 V
0.6
0.4
0.2
0.0
0.5
TJ = 125 oC
TJ = 25 oC
TJ = -55 oC
1.0 1.5
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
2.0
1
VGS = 0 V
TJ = 125 oC
0.1
0.01
TJ = 25 oC
TJ = -55 oC
0.001
0.0
0.2 0.4 0.6 0.8 1.0
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
1.2
FDY102PZ Rev.B3
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Typical Characteristics TJ = 25 °C unless otherwise noted
5
ID = -0.83 A
4
3
VDD = -8 V
VDD = -10 V
2
VDD = -12 V
1
0
0.0 0.5 1.0 1.5 2.0 2.5
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
3.0
105
VGS = 0 V
103
500
100
Ciss
Coss
10 Crss
f = 1 MHz
VGS = 0 V
1
0.1 1 10 20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure8. CapacitancevsDrain
to Source Voltage
2
1
1 ms
101
TJ = 125 oC
10-1
TJ = 25 oC
10-3
0 3 6 9 12
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 9. Gate Leakage Current
vs Gate to Source Voltage
15
10 ms
0.1
0.01
0.1
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RθJA = 280 oC/W
TA = 25 oC
100 ms
1s
10 ms
DC
1 10
-VDS, DRAIN to SOURCE VOLTAGE (V)
60
Figure 10. Forward Bias Safe
Operating Area
30
VGS = -4.5 V
10
SINGLE PULSE
RθJA = 280 oC/W
TA = 25 oC
1
0.2
10-3
10-2
10-1
100
101
t, PULSE WIDTH (sec)
Figure 11. Single Pulse Maximum Power Dissipation
100
1000
FDY102PZ Rev.B3
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Typical Characteristics TJ = 25 °C unless otherwise noted
2
1
0.1
0.02
10-3
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
RθJA = 280 oC/W
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
10-2 10-1 100 101 100
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Junction-to-Ambient Transient Thermal Response Curve
1000
FDY102PZ Rev.B3
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Dimensional Outline and Pad Layout
1.70
1.50
3
0.35
0.25
0 .5 0
0.50
0.98
0.78
(0.15)
1
1.70
1.50
2
0.50
1.00
0.78
0.58
1.14
1.80
0.50
0.66
LAND PATTERN RECOM M ENDATION
SEE D ETAIL A
0.20
0.04
0.43
0.28
0.54
0.34
0.10
0.00
DETAIL A
SCALE 2 : 1
NOTES: UNLESS OTHERW ISE SPECIFIED
A) THIS PACKAGE CONFOR MS TO EIAJ
SC89 PACKAGING STANDARD.
B) ALL DIM ENSIONS ARE IN M ILLIM ETERS.
C) DIM ENSIONS AR E EXCLUSIVE OF BURRS,
M OLD FLASH, AND TIE BAR EXTRUSIONS.
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, spe-
cifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_NMADA-003
FDY102PZ Rev.B3
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intended to be an exhaustive list of all such trademarks.
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tm
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Saving our world, 1mW/W/kW at a time™
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Solutions for Your Success™
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Sync-Lock™
®*
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仙童
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Advance Information
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Full Production
Not In Production
FDY102PZ Rev. B3
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I68
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