Fujitsu Electronic Components Datasheet  

MB90F931S

16-bit Microcontrollers



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FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-13754-3E
16-bit Microcontrollers
CMOS
F2MC-16LX MB90930 Series
MB90931/931S/F931/F931S/V930-101/V930-102
DESCRIPTION
The MB90930 series is a family of general-purpose FUJITSU SEMICONDUCTOR 16-bit microcontrollers de-
signed for applications such as vehicle instrument panel control.
The instruction set retains the AT architecture from the F2MC-8L and F2MC-16L families, with further refinements
including high-level language instructions, extended addressing modes, improved multiplication and division
operations (signed), and bit processing. In addition, long word processing is made possible by the inclusion of
a built-in 32-bit accumulator.
Note: F2MC is the abbreviation of FUJITSU Flexible Microcontroller.
FEATURES
• Clock
Built-in PLL clock frequency multiplication circuit.
Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and
multiplication of 1 to 8 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 32 MHz).
Operation by sub clock (up to 50 kHz : 100 kHz oscillation clock divided by two) is allowed.
• 16-bit input capture (8 channels)
Detects rising, falling, or both edges.
16-bit capture register × 8
The value of a 16-bit free-run timer counter is latched upon detection of an edge input to pin and an interrupt
request is generated.
• 16-bit reload timer (4 channels)
16-bit reload timer operation (select toggle output or one-shot output)
Selectable event count function
(Continued)
For the information for microcontroller supports, see the following web site.
This web site includes the "Customer Design Review Supplement" which provides the latest cautions on
system development and the minimal requirements to be checked to prevent problems before the system
development.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2009-2010 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2010.9


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MB90930 Series
(Continued)
• Real time watch timer (main clock)
Operates directly from oscillator clock.
Interrupt can be generated by second/minute/hour/date counter overflow.
• PPG timer (6 channels)
Output pins (6 channels), external trigger input pin (1 channel)
Operation clock frequencies : fCP, fCP/22, fCP/24, fCP/26
• Delay interrupt
Generates interrupt for task switching.
Interrupts to CPU can be generated/cleared by software setting.
• External interrupts (8 channels)
8-channel independent operation
Interrupt source setting available : “L” to “H” edge/ “H” to “L” edge/ “L” level/ “H” level.
• 8/10-bit A/D converter (24 channels)
Conversion time : 3 μs (at fCP = 32 MHz)
External trigger activation available (P50/INT0/ADTG)
Internal timer activation available (16-bit reload timer 1)
• UART(LIN/SCI) (4 channels)
Equipped with full duplex double buffer
Clock-asynchronous or clock-synchronous serial transfer is available.
• CAN interface (1 channel).
Conforms to CAN specifications version 2.0 Part A and B.
Automatic resend in case of error.
Automatic transfer in response to remote frame.
16 prioritized message buffers for data and ID
Multiple message support
Flexible configuration for receive filter : Full bit compare/full bit mask/two partial bit masks
Supports up to 1 Mbps
CAN wakeup function (RX connected to INT0 internally)
• LCD controller/driver (32 segment × 4 common)
Segment driver and command driver with direct LCD panel (display) drive capability
• Reset on detection of low voltage/program loop
Automatic reset when low voltage is detected.
Program looping detection function
• Stepping motor controller (4 channels)
High current output for each channel × 4
Synchronized 8/10-bit PWM for each channel × 2
• Sound generator (2 channels)
8-bit PWM signal mixed with tone frequency from 8-bit reload counter.
PWM frequencies : 125 kHz, 62.5 kHz, 31.2 kHz, 15.6 kHz (at fCP = 32 MHz)
Tone frequencies : PWM frequency /2/ , divided by (reload frequency +1)
• Input/output ports
General-purpose input/output port (CMOS output) 93 ports
• Function for port input level selection
Automotive/CMOS-Schmitt
• Flash memory security function
Protects the contents of Flash memory (Flash memory product only)
2 DS07-13754-3E


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MB90930 Series
PRODUCT LINEUP
Part number
MB90F931
Parameter
MB90F931S
MB90931
MB90931S
MB90V930- MB90V930-
102 101
Type
Flash memory
Mask ROM
Evaluation
CPU
F2MC-16LX CPU
System clock
PLL clock multiplier circuit ( × 1, × 2, × 3, × 4, × 6, × 8, 1/2 when PLL stopped)
Minimum instruction execution time 31.25ns (with 4 MHz oscillation clock × 8)
Sub clock pins
(X0A, X1A)
Yes
No
Yes
No
Yes
No
ROM
Flash memory 128 Kbytes
Mask ROM 128 Kbytes
External
RAM
8 Kbytes
30 Kbytes
I/O port
91 ports
93 ports
91 ports
93 ports
91 ports
93 ports
LCD controller
32 segment × 4 common
LIN-UART
UART(LIN/SCI) 4 channels
CAN interface
1 channel
16-bit input capture
8 channels
16-bit reload timer
4 channels
16-bit free-run
timer
1 channel
Real time watch
timer
1 channel
16-bit PPG timer
6 channels
External interrupt
8 channels
8/10-bit
A/D converter
24 channels
Low-voltage/CPU
operating detection
reset
Yes
No
Stepping motor
controller
4 channels
Sound generator
2 channels
Flash memory
security
Yes
Operating voltage
3.7 V to 5.5 V
4.5 V to 5.5 V
Package
LQFP-120
PGA-299
DS07-13754-3E
3


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MB90930 Series
PIN ASSIGNMENT
(TOP VIEW)
P30/SEG06
P31/SEG07
P32/SEG08
P33/SEG09
P34/SEG10
P35/SEG11
P36/SEG12
P37/SEG13
P40/SEG14
P41/SEG15
P42/SEG16
P43/SEG17
P92/X0A*1
P93/X1A*2
VCC
VSS
C
P44/SEG18
P45/SEG19
P46/SEG20
P47/SEG21
P90/SEG22
P91/SEG23
PD0/SIN2
PD1/SOT2
PD2/SCK2
PD3/SIN3
PD4/SOT3
PD5/SCK3
PD6/TOT2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
LQFP-120
90 RST
89 MD0
88 MD1
87 MD2
86 DVSS
85 DVCC
84 P87/PWM2M3/AN23
83 P86/PWM2P3/AN22
82 P85/PWM1M3/AN21
81 P84/PWM1P3/AN20
80 P83/PWM2M2/AN19
79 P82/PWM2P2/AN18
78 P81/PWM1M2/AN17
77 P80/PWM1P2/AN16
76 DVSS
75 DVCC
74 P77/PWM2M1/AN15
73 P76/PWM2P1/AN14
72 P75/PWM1M1/AN13
71 P74/PWM1P1/AN12
70 P73/PWM2M0/AN11
69 P72/PWM2P0/AN10
68 P71/PWM1M0/AN09
67 P70/PWM1P0/AN08
66 DVSS
65 DVCC
64 PE2/SGO1/IN3R
63 P55/INT2
62 RSTO
61 P54/SGA1/IN2R
*1 : The X0A pin is optional. The pin does not exist on the single system product.
*2 : The X1A pin is optional. The pin does not exist on the single system product.
(FPT-120P-M21)
4 DS07-13754-3E


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MB90930 Series
PIN DESCRIPTIONS
Pin no.
108
107
13
14
90
93
94
95
96
97
98
99
100
101
102
103
Pin name
X0
X1
X0A
P92
X1A
P93
RST
P00
SEG24
P01
SEG25
P02
SEG26
P03
SEG27
P04
SEG28
P05
SEG29
P06
SEG30
P07
SEG31
P10
PPG2
IN5
P11
TOT0
PPG3
IN4
P12
TIN0
PPG4
I/O circuit
type*1
A
B
I
B
I
C
F
F
F
F
F
F
F
F
I
I
I
Function
High-speed oscillation input pin
High-speed oscillation output pin
Low-speed oscillation input pin
General-purpose I/O port
Low-speed oscillation output pin
General-purpose I/O port
Reset input pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
16-bit PPG ch.2 output pin
Input capture ch.5 trigger input pin
General-purpose I/O port
16-bit reload timer ch.0 TOT output pin
16-bit PPG ch.3 output pin
Input capture ch.4 trigger input pin
General-purpose I/O port
16-bit reload timer ch.0 TIN input pin
16-bit PPG ch.4 output pin
DS07-13754-3E
(Continued)
5


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MB90930 Series
Pin no.
104
109
110
111
112
113
114
115
116
117
118
119
120
1
2
3
4
5
6
Pin name
P13
PPG5
P14
TIN2
IN1
P15
IN0
COM0
COM1
COM2
COM3
P22
SEG00
P23
SEG01
P24
SEG02
P25
SEG03
P26
SEG04
P27
SEG05
P30
SEG06
P31
SEG07
P32
SEG08
P33
SEG09
P34
SEG10
P35
SEG11
I/O circuit
type*1
I
I
I
P
P
P
P
F
F
F
F
F
F
F
F
F
F
F
F
Function
General-purpose I/O port
16-bit PPG ch.5 output pin
General-purpose I/O port
16-bit reload timer ch.2 TIN input pin
Input capture ch.1 trigger input pin
General-purpose I/O port
Input capture ch.0 trigger input pin
LCD controller/driver common output pin
LCD controller/driver common output pin
LCD controller/driver common output pin
LCD controller/driver common output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
6
(Continued)
DS07-13754-3E


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MB90930 Series
Pin no.
7
8
9
10
11
12
18
19
20
21
37
58
59
60
Pin name
P36
SEG12
P37
SEG13
P40
SEG14
P41
SEG15
P42
SEG16
P43
SEG17
P44
SEG18
P45
SEG19
P46
SEG20
P47
SEG21
P50
INT0
ADTG
P51
INT1
RX1
P52
TX1
P53
INT3
I/O circuit
type*1
F
F
F
F
F
F
F
F
F
F
I
I
I
I
Function
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
INT0 external interrupt input pin
A/D converter external trigger input pin
General-purpose I/O port
INT1 external interrupt input pin
CAN interface 1 RX input pin
General-purpose I/O port
CAN interface 1 TX output pin
General-purpose I/O port
INT3 external interrupt input pin
(Continued)
DS07-13754-3E
7


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MB90930 Series
Pin no.
61
63
91
92
39
40
41
42
43
44
45
Pin name
P54
SGA1
IN2R
P55
INT2
P56
SGO0
FRCK
IN5R
P57
SGA0
IN4R
P60
AN0
P61
AN1
P62
AN2
P63
AN3
P64
AN4
P65
AN5
P66
AN6
I/O circuit
type*1
I
I
I
I
H
H
H
H
H
H
H
Function
General-purpose I/O port
Sound generator ch.1 SGA output pin
Input capture ch.2 trigger input pin
General-purpose I/O port
INT2 external interrupt input pin
General-purpose I/O port
Sound generator ch.0 SGO output pin
Free-run timer clock input pin
Input capture ch.5 trigger input pin
General-purpose I/O port
Sound generator ch.0 SGA output pin
Input capture ch.4 trigger input pin
General-purpose I/O port
A/D converter input pin
General-purpose I/O port
A/D converter input pin
General-purpose I/O port
A/D converter input pin
General-purpose I/O port
A/D converter input pin
General-purpose I/O port
A/D converter input pin
General-purpose I/O port
A/D converter input pin
General-purpose I/O port
A/D converter input pin
(Continued)
8 DS07-13754-3E


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MB90930 Series
Pin no.
46
67
68
69
70
71
72
73
74
77
78
Pin name
P67
AN7
P70
PWM1P0
AN08
P71
PWM1M0
AN09
P72
PWM2P0
AN10
P73
PWM2M0
AN11
P74
PWM1P1
AN12
P75
PWM1M1
AN13
P76
PWM2P1
AN14
P77
PWM2M1
AN15
P80
PWM1P2
AN16
P81
PWM1M2
AN17
I/O circuit
type*1
H
L
L
L
L
L
L
L
L
L
L
Function
General-purpose I/O port
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.0 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.0 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.0 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.0 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.1 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.1 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.1 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.1 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.2 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.2 output pin
A/D converter input pin
(Continued)
DS07-13754-3E
9


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MB90930 Series
Pin no.
79
80
81
82
83
84
22
23
31
32
33
34
48
Pin name
P82
PWM2P2
AN18
P83
PWM2M2
AN19
P84
PWM1P3
AN20
P85
PWM1M3
AN21
P86
PWM2P3
AN22
P87
PWM2M3
AN23
P90
SEG22
P91
SEG23
P94
V0
P95
V1
P96
V2
V3
PC0
SIN0
INT4
I/O circuit
type*1
L
L
L
L
L
L
F
F
G
G
G
J
Function
General-purpose output-only port
Stepping motor controller ch.2 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.2 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.3 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.3 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.3 output pin
A/D converter input pin
General-purpose output-only port
Stepping motor controller ch.3 output pin
A/D converter input pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver segment output pin
General-purpose I/O port
LCD controller/driver reference power supply pin
General-purpose I/O port
LCD controller/driver reference power supply pin
General-purpose I/O port
LCD controller/driver reference power supply pin
LCD controller/driver reference power supply pin
General-purpose I/O port
UART ch.0 serial data input pin
INT4 external interrupt input pin
(Continued)
10 DS07-13754-3E


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MB90930 Series
Pin no.
49
50
51
52
53
54
55
24
25
26
27
Pin name
PC1
SOT0
INT5
IN3
PC2
SCK0
INT6
IN2
PC3
SIN1
INT7
PC4
SOT1
PC5
SCK1
TRG
PC6
PPG0
TOT1
IN7
PC7
PPG1
TIN1
IN6
PD0
SIN2
PD1
SOT2
PD2
SCK2
PD3
SIN3
I/O circuit
type*1
I
I
J
I
I
I
I
J
I
F
J
Function
General-purpose I/O port
UART ch.0 serial data output pin
INT5 external interrupt input pin
Input capture ch.3 trigger input pin
General-purpose I/O port
UART ch.0 serial clock I/O pin
INT6 external interrupt input pin
Input capture ch.2 trigger input pin
General-purpose I/O port
UART ch.1 serial data input pin
INT7 external interrupt input pin
General-purpose I/O port
UART ch.1 serial data output pin
General-purpose I/O port
UART ch.1 serial clock I/O pin
16-bit PPG ch.0 to ch.5 external trigger input pin
General-purpose I/O port
16-bit PPG ch.0 output pin
16-bit reload timer ch.1 TOT output pin
Input capture ch.7 trigger input pin
General-purpose I/O port
16-bit PPG ch.1 output pin
16-bit reload timer ch.1 TIN input pin
Input capture ch.6 trigger input pin
General-purpose I/O port
UART ch.2 serial data input pin
General-purpose I/O port
UART ch.2 serial data output pin
General-purpose I/O port
UART ch.2 serial clock I/O pin
General-purpose I/O port
UART ch.3 serial data input pin
(Continued)
DS07-13754-3E
11


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MB90930 Series
(Continued)
Pin no.
Pin name
I/O circuit
type*1
Function
PD4
28
SOT3
General-purpose I/O port
I
UART ch.3 serial data output pin
PD5
29
SCK3
General-purpose I/O port
F
UART ch.3 serial clock I/O pin
PD6
30
TOT2
General-purpose I/O port
I
16-bit reload timer ch.2 TOT output pin
PE0 General-purpose I/O port
56 TOT3
I 16-bit reload timer ch.3 TOT output pin
IN7R
Input capture ch.7 trigger input pin
PE1 General-purpose I/O port
57 TIN3
I 16-bit reload timer ch.3 TIN input pin
IN6R
Input capture ch.6 trigger input pin
PE2 General-purpose I/O port
64 SGO1
I Sound generator ch.1 SGO output pin
IN3R
Input capture ch.3 trigger input pin
62 RSTO
N Internal reset signal output pin
65, 75, 85
DVCC
Power supply input pins dedicated for high current output buffer
66, 76, 86
DVSS
Power supply GND pins dedicated for high current output buffer
35 AVCC
A/D converter dedicated power supply input pin
38 AVSS
A/D converter dedicated power supply GND pin
36 AVRH
A/D converter Vref+ input pin. Vref- is fixed to AVSS.
89 MD0
D Mode setting input pin. Connect to VCC pin.
88 MD1
D Mode setting input pin. Connect to VCC pin.
87
MD2
D/E*2 Mode setting input pin. Connect to VSS pin.
17 C
External capacitor pin.
Connect a 0.1 μF capacitor between this pin and the VSS pin.
15, 105
VCC
Power supply input pins
16, 47, 106
VSS
GND power supply pins
*1 : For I/O circuit type, refer to “ I/O CIRCUIT TYPE”.
*2 : The I/O circuit type is D for Flash memory products/Mask ROM products and E for evaluation products.
12 DS07-13754-3E


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MB90930 Series
I/O CIRCUIT TYPE
Type
A
X1
X0
X1
X0
B
X1A
Circuit
XOUT
Remarks
High-speed oscillation pin
(Flash memory product, Mask ROM
product)
Oscillation feedback resistance :
approx. 1 MΩ
Standby control signal
Xout
High-speed oscillation pin
(Evaluation product)
Oscillation feedback resistance :
approx. 1 MΩ
Standby control signal
Xout
low-speed oscillation pin
Oscillation feedback resistance :
approx. 10 MΩ
X0A
C
D
Pull-up resistor
Standby control signal
CMOS hysteresis input
CMOS hysteresis input
Input-only pin (with pull-up resistance)
• Attached pull-up resistor :
approx. 50 kΩ
• CMOS hysteresis input
(VIH/VIL = 0.8 VCC/0.2 VCC)
Input-only pin
• CMOS hysteresis input
(VIH/VIL = 0.8 VCC/0.2 VCC)
Note: The MD2 pin of the Flash
memory products uses this
circuit type.
(Continued)
DS07-13754-3E
13


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MB90930 Series
Type
E
F
G
Circuit
CMOS hysteresis input
Pull-down resistor
P-ch Pout
N-ch Nout
LCD input
Remarks
Input-only pin (with pull-down
resistance)
• Attached pull-down resistance :
approx. 50 kΩ
• CMOS hysteresis input
(VIH/VIL = 0.8 VCC/0.2 VCC)
Note: The MD2 pin of the Mask ROM
products and the evaluation
products uses this circuit type.
LCD output common general-
purpose port
• CMOS output
(IOH/IOL = ± 4 mA)
• Hysteresis input
(VIH/VIL = 0.8 VCC/0.2 VCC)
• Automotive input
(VIH/VIL = 0.8 VCC/0.5 VCC)
CMOS hysteresis input
Standby control signal or
LCD input enable signal
Automotive input
Standby control signal or
LCD input enable signal
LCDC reference power supply com-
mon general-purpose port
P-ch Pout
• CMOS output (IOH/IOL = ± 4 mA)
• CMOS hysteresis input
N-ch Nout
(VIH/VIL = 0.8 VCC/0.2 VCC)
• Automotive input
LCDC reference power supply
(VIH/VIL = 0.8 VCC/0.5 VCC)
input
CMOS hysteresis input
Standby control signal or
LCD output switching signal
Automotive input
Standby control signal or
LCD output switching signal
(Continued)
14 DS07-13754-3E


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MB90930 Series
Type
H
I
J
P-ch
N-ch
P-ch
N-ch
P-ch
N-ch
Circuit
Pout
Nout
Analog input
CMOS hysteresis input
Standby control signal or
analog input enable signal
Automotive input
Standby control signal or
analog input enable signal
Pout
Nout
CMOS hysteresis input
Standby control signal
Automotive input
Standby control signal
Pout
Nout
CMOS hysteresis input
Standby control signal
Automotive input
Standby control signal
CMOS input (SIN)
Standby control signal
Remarks
A/D converter input common
general-purpose port
• CMOS output
(IOH/IOL = ± 4 mA)
• CMOS hysteresis input
(VIH/VIL = 0.8 VCC/0.2 VCC)
• Automotive input
(VIH/VIL = 0.8 VCC/0.5 VCC)
General-purpose port
• CMOS output (IOH/IOL = ± 4 mA)
• CMOS hysteresis input
(VIH/VIL = 0.8 VCC/0.2 VCC)
• Automotive input
(VIH/VIL = 0.8 VCC/0.5 VCC)
General-purpose port (serial input)
• CMOS output (IOH/IOL = ± 4 mA)
• CMOS hysteresis input
(VIH/VIL = 0.8 VCC/0.2 VCC)
• CMOS input (SIN)
(VIH/VIL = 0.7 VCC/0.3 VCC)
• Automotive input
(VIH/VIL = 0.8 VCC/0.5 VCC)
(Continued)
DS07-13754-3E
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MB90930 Series
Type
K
L
Circuit
P-ch Pout
N-ch Nout
Analog output
CMOS hysteresis input
Standby control signal or
analog input enable signal
Automotive input
Standby control signal or
analog input enable signal
CMOS input (SIN)
Standby control signal or
analog input enable signal
P-ch Pout
High current
N-ch Nout
Analog input
Remarks
A/D converter input common gen-
eral-purpose port (serial input)
• CMOS output (IOH/IOL = ± 4 mA)
• CMOS hysteresis input
(VIH/VIL = 0.8 VCC/0.2 VCC)
• CMOS input (SIN)
(VIH/VIL = 0.7 VCC/0.3 VCC)
• Automotive input
(VIH/VIL = 0.8 VCC/0.5 VCC)
A/D converter input common and
high current output port (SMC pin)
CMOS output (IOH/IOL = ± 30 mA)
(Continued)
16 DS07-13754-3E


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MB90930 Series
(Continued)
Type
M
P-ch
N-ch
N
Evaluation product
Circuit
Remarks
Pout
Nout
LCDC output
CMOS hysteresis input
Standby control signal or
LCDC output switching signal
Automotive input
Standby control signal or
LCDC output switching signal
LCDC output common general-
purpose port (serial input) )
• CMOS output (IOH/IOL = ± 4 mA)
• CMOS hysteresis input
(VIH/VIL = 0.8 VCC/0.2 VCC)
• CMOS input (SIN)
(VIH/VIL = 0.7 VCC/0.3 VCC)
• Automotive input
(VIH/VIL = 0.8 VCC/0.5 VCC)
CMOS input (SIN)
Standby control signal or
LCDC output switching signal
Flash / Mask product
N-ch open-drain pin
IOL = 4 mA
P-ch
N-ch
Nout
N-ch
Nout
O Input-only pin
Automotive input
Automotive input
(VIH/VIL = 0.8 VCC/0.5 VCC)
P LCDC output pin (COM pin)
P-ch
LCDC output
N-ch
DS07-13754-3E
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MB90930 Series
HANDLING DEVICES
Strictly observe maximum rated voltages (preventing latch-up)
In CMOS IC devices, a condition known as latch-up may occur if voltages higher than VCC or lower than VSS are
applied to input or output pins other than medium or high withstand voltage pins, or if the voltage applied between
VCC and VSS pins exceeds the rated voltage level. If a latch-up occurs, the power supply current may increase
dramatically and may destroy semiconductor elements. When using semiconductor devices, always take suffi-
cient care to avoid exceeding maximum ratings.
When the analog system power supply is switched on or off, be careful not to apply the analog power supply
(AVCC, AVRH), the analog input voltages and the power supply voltage for the high current output buffer pins
(DVCC) in excess of the digital power supply voltage (VCC).
Once the digital power supply voltage (VCC) has been disconnected, the analog power supply (AVCC, AVRH) and
the power supply voltage for the high current output buffer pins (DVCC) may be turned on in any sequence.
Supply voltage stabilization
Rapid fluctuations in the power supply voltage can cause malfunctions even if the Vcc power supply voltage
remains within the warranted operating range. It is recommended that the power supply be stabilized such that
ripple fluctuations (P-P value) at commercial frequencies (50 Hz/60 Hz) be limited to within 10% of the standard
VCC value, and that transient fluctuations due to power supply switching, etc. be limited to a rate of 0.1 V/ms or less.
Precautions when turning the power on
In order to prevent the built-in step-down circuits from malfunctioning, the time taken for the voltage to rise
(0.2 V to 2.7 V) during power-on should be less than 50 μs.
Handling unused pins
If unused input pins are left open, they may cause malfunctions or latch-up which may lead to permanent damage
to the semiconductor. Unused input pins should therefore be pulled up or pulled down through a resistor of at
least 2 kΩ.
Unused input/output pins may be set to the output state and left open, or set to the input state and connected
to a pull-up or pull-down resistance of 2 kΩ or more.
Handling A/D converter power supply pins
Even if the A/D converter is not used, the power supply pins should be connected such as AVCC = VCC, and
AVSS = AVRH = VSS.
Notes on using an external clock
Even when an external clock is used, an oscillation stabilization wait time is required following power-on reset
or release from sub clock mode or stop mode. Furthermore, only the X0A pin should be driven when an external
clock is used, with the X1A pin open as shown in the following diagram. Do not use high-speed oscillation pins
(X0 and X1) for external clock input.
X0A
OPEN
X1A
MB90930 Series
Sample external clock connection
18 DS07-13754-3E


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MB90930 Series
Notes on operating in PLL clock mode
On this microcontroller, if in case the crystal oscillator breaks off while the PLL clock mode is selected, a self-
oscillator circuit contained in the PLL may continue its operation at its self-running frequency. However, FUJITSU
SEMICONDUCTOR will not guarantee results of operations if such failure occurs.
Crystal oscillator circuit
Noise around the X0/X1 may cause this device to operate abnormally. Make sure to provide bypass capacitors
via shortest distance from X0, X1 pins, crystal oscillator (or ceramic oscillator) and ground lines, and make sure,
to the utmost effort, that lines of oscillation circuit do not cross the lines of other circuits while you design a
printed circuit board.
It is highly recommended to provide a printed circuit board art work surrounding X0 and X1 pins with a ground
area for stabilizing the operation.
Please ask each crystal maker to evaluate the oscillational characteristics of the crystal and this device.
Power supply pins
Devices including multiple VCC or VSS pins are designed such that pins that need to be at the same potential
are interconnected internally to prevent malfunctions such as latch-up. To reduce unnecessary radiation, prevent
malfunctioning of the strobe signal due to the rise of ground level, and observe the standard for total output
current, be sure to externally connect the VCC and VSS pins to the power supply and ground respectively.
Always connect all of the VCC pins to the same potential and all of the VSS pins to ground as shown in the
following diagram. The device will not operate correctly if multiple VCC or VSS pins are connected to different
voltages, even if those voltages are within the guaranteed operating ranges.
VCC
VSS
VCC
VSS
VCC
VSS
VSS
VCC
VSS
VCC
Power supply input pins (Vcc/Vss)
In addition, care must be given to connecting the VCC and VSS pins of this device to the current supply source
with as low impedance as possible. It is recommended that a 1.0 μF bypass capacitor be connected between
the VCC and VSS pins as close to the pins as possible.
DS07-13754-3E
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MB90930 Series
Sequence for connecting the A/D converter power supply and analog inputs
The A/D converter power supply (AVCC, AVRH) and analog inputs (AN0 to AN23) must be applied after the digital
power supply (VCC) is switched on. When turning the power off, the A/D converter power supply and analog
inputs must be disconnected before the digital power supply is switched off (VCC). Ensure that AVRH does not
exceed AVcc during either power-on or power-off. Even when pins which double as analog input pins are used
as input ports, be sure that the input voltage does not exceed AVCC (turning on/off the analog and digital power
supplies simultaneously is acceptable).
Handling the power supply for high-current output buffer pins (DVCC, DVSS)
• Flash memory products/Mask ROM products (MB90F931/MB90F931S/MB90931/MB90931S)
In the Flash memory products/Mask ROM products, the power supply for the high-current output buffer pins
(DVCC, DVSS) is isolated from the digital power supply (VCC). Therefore, DVcc can be set to a higher voltage
than Vcc. If the power supply for the high-current output buffer pins (DVCC, DVSS) is supplied before the digital
power supply (VCC), however, care needs to be taken because it is possible that the port 7 or port 8 stepping
motor outputs may momentarily output an “H” or “L” level during the DVcc rise. In order to prevent this, connect
the digital power supply (VCC) prior to connecting the power supply for the high-current output buffer pins.
Even when the high-current output buffer pins are used as general-purpose ports, power should be supplied
to the power supply pins for the high-current output buffer pins (DVCC, DVSS).
• Evaluation product (MB90V930-102/MB90V930-101)
In the evaluation products, the power supply for the high-current output buffer pins (DVCC, DVSS) is not isolated
from the digital power supply (VCC). Therefore, DVcc must be set to a lower voltage than Vcc. The power supply
for the high-current output buffer pins (DVCC, DVSS) must always be applied after the digital power supply
(VCC) has been connected, and disconnected before the digital power supply (Vcc) is disconnected (the power
supply for the high-current output buffer pins may also be connected and disconnected simultaneously with
the digital power supply).
Even when the high-current output buffer pins are used as general-purpose ports, power should be supplied
to the power supply pins for the high-current output buffer pins (DVCC, DVSS).
Pull-up/pull-down resistors
MB90930 series does not support internal pull-up/pull-down resistors. Use external components as necessary.
Precautions when not using a sub clock signal
If the X0A and X1A pins are not connected to an oscillator, apply a pull-down resistance to the X0A pin and
leave the X1A pin open.
Flash memory security function
A security bit is located within the Flash memory region. The security function is activated by writing the protection
code 01H to the security bit.
Do not write the value 01H to this address if you are not using the security function.
Please refer to following table for the address of the security bit.
Flash memory size
Address for security bit
MB90F931
MB90F931S
Built-in 1 Mbit Flash Memory
FE0001H
20 DS07-13754-3E


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MB90930 Series
Serial communication
In serial communication, reception of wrong data may occur due to noise or other causes. Therefore, design a print-
ed circuit board to prevent noise from occurring. Taking account of the reception of wrong data, detect errors by
measures such as adding a checksum to the end of data. If an error is detected, retransmit the data.
Characteristic difference between flash device and mask ROM device
In the flash device and the mask ROM device, the electrical characteristic including current consumption, ESD,
latch-up, the noise characteristic, and oscillation characteristic, etc. is different according to the difference between
the chip layout and the memory structure.
Reconfirm the electrical characteristic when the product is replaced by another product of the same series.
DS07-13754-3E
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MB90930 Series
BLOCK DIAGRAM
Clock control circuit
Watchdog timer
Time-base timer
Watch timer
(for sub clock)
Sound generator 0
Sound generator 1
CAN controller 1
CPU
F2MC-16LX core
Interrupt controller
Low-voltage reset
CPU operation
detection reset
External interrupt
(8 channels)
LIN-UART 0
Prescaler 0
LIN-UART 1
Prescaler 1
LIN-UART 2
Prescaler 2
LIN-UART 3
Prescaler 3
16-bit PPG timer 0
16-bit PPG timer 1
16-bit PPG timer 2
16-bit PPG timer 3
16-bit PPG timer 4
16-bit PPG timer 5
16-bit reload timer 0
16-bit reload timer 1
16-bit reload timer 2
16-bit reload timer 3
Real-time watch timer
16-bit ICU 0 (2 channels)
16-bit ICU 1 (2 channels)
16-bit ICU 2 (2 channels)
16-bit ICU 3 (2 channels)
16-bit free-run timer
* : Flash memory products/Mask ROM products.
Stepping motor controller 0
Stepping motor controller 1
Stepping motor controller 2
Stepping motor controller 3
A/D converter
(24 channels)
LCD controller/driver
(32 SEG/4 COM)
RAM
(8 Kbytes)*
Flash / ROM
(128 Kbytes)*
22 DS07-13754-3E


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MB90930 Series
MEMORY MAP
000000H
0000F0H
000100H
003700H
004000H
008000H
010000H
F80000H
MB90V930-102/
MB90V930-101
Peripheral area
Register
RAM area
(13.5 Kbytes)
Peripheral area
RAM area
(16 Kbytes)
ROM area
(FF bank image)
ROM decoding area
FFFFFFH
000000H
0000F0H
000100H
002100H
MB90F931/MB90F931S
MB90931/MB90931S
Peripheral area
Register
RAM area
(8 Kbytes)
003700H
004000H
Peripheral area
008000H
010000H
ROM area
(FF bank image)
FE0000H
FFFFFFH
Flash / ROM area
(128 Kbytes)
: Internal access prohibited
Note: To select models without the ROM mirror function, refer to the “ROM Mirror Function Selection Module” in
Hardware Manual. The image of the ROM data in the FF bank appears at the top of the 00 bank, in order
to enable efficient use of small C compiler models. The lower 16-bits of the FF bank addresses are allocated
to the same addresses as the lower 16-bits of the 00 bank, making it possible to reference tables in ROM
without declaring the “far” modifier with the pointers. For example, when an access is made to the address
00C000H, the actual address to be accessed is FFC000H in ROM. Because the size of the FF bank ROM
area exceeds 32 Kbytes, it is not possible to view the entire region in the 00 bank image. Therefore because
the ROM data from FF8000H to FFFFFFH appears in the image from 008000H to 00FFFFH, it is recommended
that ROM data tables be stored in the area from FF8000H to FFFFFFH.
DS07-13754-3E
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MB90930 Series
I/O MAP
Address
Register name
000000H Port 0 data register
000001H Port 1 data register
000002H Port 2 data register
000003H Port 3 data register
000004H Port 4 data register
000005H Port 5 data register
000006H Port 6 data register
000007H Port 7 data register
000008H Port 8 data register
000009H Port 9 data register
00000AH,
00000BH
00000CH Port C data register
00000DH Port D data register
00000EH Port E data register
00000FH
000010H Port 0 direction register
000011H Port 1 direction register
000012H Port 2 direction register
000013H Port 3 direction register
000014H Port 4 direction register
000015H Port 5 direction register
000016H Port 6 direction register
000017H Port 7 direction register
000018H Port 8 direction register
000019H Port 9 direction register
00001AH Analog input enable
00001BH Analog input enable
00001CH Port C direction register
00001DH Port D direction register
00001EH Port E direction register
00001FH Analog input enable
000020H Lower A/D control status register
000021H Higher A/D control status register
000022H Lower A/D data register
000023H Higher A/D data register
24
Symbol
PDR0
PDR1
PDR2
PDR3
PDR4
PDR5
PDR6
PDR7
PDR8
PDR9
Read/write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Resource name
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
Port 9
Initial value
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
(Disabled)
PDRC
R/W
PDRD
R/W
PDRE
R/W
(Disabled)
DDR0
R/W
DDR1
R/W
DDR2
R/W
DDR3
R/W
DDR4
R/W
DDR5
R/W
DDR6
R/W
DDR7
R/W
DDR8
R/W
DDR9
R/W
ADER6
R/W
ADER7
R/W
DDRC
R/W
DDRD
R/W
DDRE
R/W
ADER8
R/W
ADCS0
R/W
ADCS1
R/W
ADCR0
R
ADCR1
R
Port C
Port D
Port E
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
Port 9
Port 6, A/D
Port7, A/D
Port C
Port D
Port E
Port8, A/D
A/D converter
00000000B
XX000000B
000000XXB
00000000B
00000000B
00000000B
00000000B
00000000B
00000000B
X0000000B
11111111B
11111111B
00000000B
X0000000B
XXXXX000B
11111111B
000XXXX0B
0000000XB
00000000B
XXXXXX00B
(Continued)
DS07-13754-3E


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MB90930 Series
Address
Register name
000024H
Compare clear register
000025H
000026H
Timer data register
000027H
000028H Lower timer control status register
000029H Higher timer control status register
00002AH Lower PPG0 control status register
00002BH Higher PPG0 control status register
00002CH Lower PPG1 control status register
00002DH Higher PPG1 control status register
00002EH Lower PPG2 control status register
00002FH Higher PPG2 control status register
000030H External interrupt enable
000031H External interrupt request
000032H Lower external interrupt level
000033H Higher external interrupt level
000034H Serial mode register 0
000035H Serial control register 0
000036H Reception/transmission data register 0
000037H Serial status register 0
000038H
Extended communication control
register 0
000039H Extended status control register 0
00003AH Baud rate generator register 00
00003BH Baud rate generator register 01
00003CH
to
000047H
000048H Input capture input select register
000049H
00004AH
to
00004FH
Symbol
CPCLR
TCDT
TCCSL
TCCSH
PCNTL0
PCNTH0
PCNTL1
PCNTH1
PCNTL2
PCNTH2
ENIR
EIRR
ELVRL
ELVRH
SMR0
SCR0
RDR0/
TDR0
SSR0
Read/write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W, W
R/W, W
R/W
R/W, R
ECCR0 R/W, R
ESCR0
BGR00
BGR01
R/W
R/W
R/W, R
(Disabled)
ICISR
R/W
(Disabled)
(Disabled)
Resource name Initial value
XXXXXXXXB
XXXXXXXXB
16-bit
free-run timer
00000000B
00000000B
00000000B
01X00000B
16-bit PPG0
00000000B
00000001B
16-bit PPG1
00000000B
00000001B
16-bit PPG2
00000000B
00000001B
00000000B
00000000B
External interrupt
00000000B
00000000B
00000000B
00000000B
00000000B
UART
(LIN/SCI) 0
00001000B
000000XXB
00000100B
00000000B
00000000B
Input capture
0/1/2/3/4/5/6/7
00000000B
(Continued)
DS07-13754-3E
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MB90930 Series
Address
Register name
000050H Lower timer control status register 0
000051H Higher timer control status register 0
000052H
Timer register 0/reload register 0
000053H
000054H Lower timer control status register 1
000055H Higher timer control status register 1
000056H
Timer register 1/reload register 1
000057H
000058H LCD output control register 1
000059H LCD output control register 2
00005AH Lower sound control register 0
00005BH Higher sound control register 0
00005CH Frequency data register 0
00005DH Amplitude data register 0
00005EH Decrement grade register 0
00005FH Tone count register 0
000060H
Input capture register 0
000061H
000062H
Input capture register 1
000063H
000064H
Input capture register 2
000065H
000066H
Input capture register 3
000067H
000068H Input capture control status 0/1
000069H Input capture edge register 0/1
00006AH Input capture control status 2/3
00006BH Input capture edge register 2/3
00006CH Lower LCD control register
00006DH Higher LCD control register
00006EH
Low voltage/CPU operation
detection reset control register
00006FH ROM mirror
Symbol Read/write Resource name Initial value
TMCSR0L R/W
00000000B
TMCSR0H
TMR0/
TMRLR0
R/W
R/W
16-bit reload timer XXX10000B
0 XXXXXXXXB
XXXXXXXXB
TMCSR1L R/W
00000000B
TMCSR1H
TMR1/
TMRLR1
R/W
R/W
16-bit reload timer XXX10000B
1 XXXXXXXXB
XXXXXXXXB
LOCR1
LOCR2
R/W
R/W
LCDC
11111111B
00000000B
SGCRL0
R/W
00000000B
SGCRH0
R/W
0XXXX100B
SGFR0
SGAR0
R/W
XXXXXXXXB
Sound generator 0
R/W
00000000B
SGDR0
R/W
XXXXXXXXB
SGTR0
R/W
XXXXXXXXB
IPCP0
IPCP1
XXXXXXXXB
R
XXXXXXXXB
Input capture 0/1
XXXXXXXXB
R
XXXXXXXXB
IPCP2
IPCP3
XXXXXXXXB
R
XXXXXXXXB
Input capture 2/3
XXXXXXXXB
R
XXXXXXXXB
ICS01
ICE01
R/W
00000000B
Input capture 0/1
R/W
XXX0X0XXB
ICS23
ICE23
R/W
00000000B
Input capture 2/3
R/W
XXXXXXXXB
LCRL
LCRH
R/W
R/W
LCD controller/
driver
00010000B
00000000B
LVRC
Low voltage/CPU
R/W
operation
00111000B
detection reset
ROMM
W
ROM mirror XXXXXXX1B
(Continued)
26 DS07-13754-3E


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MB90930 Series
Address
Register name
Symbol Read/write Resource name Initial value
000070H
to
00007FH
Area reserved for CAN Controller 1(Refer to “CAN CONTROLLERS”).
000080H PWM control register 0
PWC0
R/W
Stepping motor
controller 0
000000X0B
000081H
(Disabled)
000082H PWM control register 1
PWC1
R/W
Stepping motor
controller 1
000000X0B
000083H
(Disabled)
000084H PWM control register 2
PWC2
R/W
Stepping motor
controller 2
000000X0B
000085H
(Disabled)
000086H PWM control register 3
PWC3
R/W
Stepping motor
controller 3
000000X0B
000087H
(Disabled)
000088H LCD output control register 3
LOCR3
R/W
LCDC
XXXXX111B
000089H
(Disabled)
00008AH A/D setting register 0
00008BH A/D setting register 1
ADSR0
ADSR1
R/W
R/W
A/D converter
00000000B
00000000B
00008CH Port input level select 0
00008DH Port input level select 1
00008EH Port input level select 2
PIL0
PIL1
PIL2
R/W
00000000B
R/W
Port input level
select
XXXX0000B
R/W
XXXX0000B
00008FH
to
00009DH
(Disabled)
00009EH
Program address detection control
register
PACSR
R/W
Address match
detection
XXXX0X0XB
00009FH
Delayed Interrupt source generation /
Release Register
DIRR
R/W
Delay interrupt XXXXXXX0B
0000A0H Power saving mode control register
0000A1H Clock select register
LPMCR
CKSCR
R/W
R/W, R
Power saving
control circuit
00011000B
11111100B
0000A2H
to
0000A7H
(Disabled)
0000A8H Watchdog timer control register
WDTC
R, W
Watchdog timer XXXXX111B
0000A9H Time-base timer control register
TBTC
R/W, W Time-base timer 1XX00100B
0000AAH Watch timer control register
WTC R/W, W, R
Watch timer
(sub clock)
10001000B
0000ABH
to
0000ADH
(Disabled)
(Continued)
DS07-13754-3E
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MB90930 Series
Address
Register name
0000AEH Flash memory control status register
0000AFH
0000B0H Interrupt control register 00
0000B1H Interrupt control register 01
0000B2H Interrupt control register 02
0000B3H Interrupt control register 03
0000B4H Interrupt control register 04
0000B5H Interrupt control register 05
0000B6H Interrupt control register 06
0000B7H Interrupt control register 07
0000B8H Interrupt control register 08
0000B9H Interrupt control register 09
0000BAH Interrupt control register 10
0000BBH Interrupt control register 11
0000BCH Interrupt control register 12
0000BDH Interrupt control register 13
0000BEH Interrupt control register 14
0000BFH Interrupt control register 15
0000C0H
to
0000C3H
0000C4H Serial mode register 1
0000C5H Serial control register 1
0000C6H
Reception/transmission
data register 1
0000C7H Serial status register 1
0000C8H
Extended communication
control register 1
0000C9H Extended status control register 1
0000CAH Baud rate generator register 10
0000CBH Baud rate generator register 11
0000CCH Lower watch timer control register
0000CDH Middle watch timer control register
0000CEH Higher watch timer control register
Symbol Read/write Resource name Initial value
FMCS
R/W
Flash interface 000X0000B
(Disabled)
ICR00
R/W
00000111B
ICR01
R/W
00000111B
ICR02
R/W
00000111B
ICR03
R/W
00000111B
ICR04
R/W
00000111B
ICR05
R/W
00000111B
ICR06
R/W
00000111B
ICR07
ICR08
R/W
R/W
00000111B
Interrupt controller
00000111B
ICR09
R/W
00000111B
ICR10
R/W
00000111B
ICR11
R/W
00000111B
ICR12
R/W
00000111B
ICR13
R/W
00000111B
ICR14
R/W
00000111B
ICR15
R/W
00000111B
(Disabled)
SMR1
SCR1
RDR1/
TDR1
SSR1
ECCR1
ESCR1
BGR10
BGR11
WTCRL
WTCRM
WTCRH
R/W, W
R/W, W
R/W
R/W, R
R/W, R
R/W
R/W
R/W, R
R/W
R/W
R/W
UART
(LIN/SCI) 1
Real-time
watch timer
00000000B
00000000B
00000000B
00001000B
000000XXB
00000100B
00000000B
00000000B
000XXXX0B
00000000B
XXXXXX00B
(Continued)
28 DS07-13754-3E


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MB90930 Series
Address
Register name
Symbol Read/write Resource name Initial value
0000CFH PLL/Sub clock control register
PSCCR
W
PLL/Sub clock XXXX0000B
0000D0H Input capture control status 4/5
0000D1H Input capture edge register 4/5
ICS45
ICE45
R/W
R/W, R
00000000B
Input capture 4/5
XXXXXXXXB
0000D2H Input capture control status 6/7
0000D3H Input capture edge register 6/7
ICS67
ICE67
R/W
R/W, R
00000000B
Input capture 6/7
XXX0X0XXB
0000D4H Lower timer control status register 2
0000D5H Higher timer control status register 2
TMCSR2L
TMCSR2H
R/W
R/W
16-bit
reload timer 2
00000000B
XXX10000B
0000D6H Lower timer control status register 3
0000D7H Higher timer control status register 3
TMCSR3L
TMCSR3H
R/W
R/W
16-bit
reload timer 3
00000000B
XXX10000B
0000D8H Lower sound control register 1
0000D9H Higher sound control register 1
SGCRL1
SGCRH1
R/W
00000000B
Sound generator 1
R/W
0XXXX100B
0000DAH Lower PPG3 control status register
0000DBH Higher PPG3 control status register
PCNTL3
PCNTH3
R/W
R/W
16-bit PPG3
00000000B
00000001B
0000DCH Lower PPG4 control status register
0000DDH Higher PPG4 control status register
PCNTL4
PCNTH4
R/W
R/W
16-bit PPG4
00000000B
00000001B
0000DEH Lower PPG5 control status register
0000DFH Higher PPG5 control status register
PCNTL5
PCNTH5
R/W
R/W
16-bit PPG5
00000000B
00000001B
0000E0H Serial mode register 2
SMR2
R/W, W
00000000B
0000E1H Serial control register 2
SCR2
R/W, W
00000000B
0000E2H Reception/transmission data register 2
RDR2/
TDR2
R/W
00000000B
0000E3H Serial status register 2
0000E4H
Extended communication control
register 2
SSR2
ECCR2
R/W, R
R/W, R
UART
(LIN/SCI) 2
00001000B
000000XXB
0000E5H Extended status control register 2
ESCR2
R/W
00000100B
0000E6H Baud rate generator register 20
BGR20
R/W
00000000B
0000E7H Baud rate generator register 21
BGR21 R/W, R
00000000B
0000E8H Serial mode register 3
SMR3
R/W, W
00000000B
0000E9H Serial control register 3
SCR3
R/W, W
00000000B
0000EAH Reception/transmission data register 3
RDR3/
TDR3
R/W
00000000B
0000EBH Serial status register 3
0000ECH
Extended communication control
register 3
SSR3
ECCR3
R/W, R
R/W, R
UART
(LIN/SCI) 3
00001000B
000000XXB
0000EDH Extended status control register 3
ESCR3
R/W
00000100B
0000EEH Baud rate generator register 30
BGR30
R/W
00000000B
0000EFH Baud rate generator register 31
BGR31 R/W, R
00000000B
(Continued)
DS07-13754-3E
29


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MB90930 Series
Address
Register name
001FF0H Program address detection register 0
001FF1H Program address detection register 1
001FF2H Program address detection register 2
001FF3H Program address detection register 3
001FF4H Program address detection register 4
001FF5H Program address detection register 5
003700H
to
0037FFH
003800H
to
0038FFH
003900H
to
00391FH
003920H
PPG0 down counter register
003921H
003922H
PPG0 cycle setting register
003923H
003924H
PPG0 duty setting register
003925H
003926H PPG0 output division setting register
003927H
003928H
PPG1 down counter register
003929H
00392AH
PPG1 cycle setting register
00392BH
00392CH
PPG1 duty setting register
00392DH
00392EH PPG1 output division setting register
00392FH
Symbol
PADR0
PADR0
PADR0
PADR1
PADR1
PADR1
Read/write
R/W
R/W
R/W
R/W
R/W
R/W
Resource name
Address match
detection
Initial value
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
(Disabled)
(Disabled)
(Disabled)
PDCR0
R
PCSR0
W
PDUT0
W
PPGDIV0 R/W, R
(Disabled)
PDCR1
R
PCSR1
W
PDUT1
W
PPGDIV1 R/W, R
(Disabled)
16-bit PPG0
16-bit PPG1
11111111B
11111111B
11111111B
11111111B
00000000B
00000000B
11111100B
11111111B
11111111B
11111111B
11111111B
00000000B
00000000B
11111100B
(Continued)
30 DS07-13754-3E





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